Design and Implementation of Time-Frequency Taming Algorithm of Rubidium Atomic Clock Based on FPGA

Songfei Sun; Yuanhang Hou; Yiheng Lv; Zhiming Wang; Qun Chen

doi:10.62177/jaet.v2i2.218

Authors

Songfei Sun Henan Polytechnic
Yuanhang Hou Henan Polytechnic
Yiheng Lv Henan Polytechnic
Zhiming Wang Henan Polytechnic
Qun Chen Henan Polytechnic

DOI:

https://doi.org/10.62177/jaet.v2i2.218

Keywords:

Rubidium Atomic Clock, Digital Phase Locked Loop, 1pps, Frequency Taming

Abstract

Synchronously improving the accuracy of time and frequency sources in electronic measurement systems can enhance measurement precision. Fully combining the good long-term stability of 1pps output from satellite navigation receiver and the good terminal stability of rubidium atomic clock, a frequency and time-locked algorithm based on second-order digital phase-locked loop is designed, which integrates frequency taming and time synchronization, and is implemented based on FPGA; The test results show that the algorithm can obtain a better accuracy 1PPS time signal while taming the frequency with good long-term stability external 1pps.

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